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RV-8564-C2 application manual date: february 2005 revision no.: 1.2 page 1/20 headquarters: micro crystal div. of eta sa mhlestrasse 14 ch-2540 grenchen switzerland tel. fax internet email +41 32 655 82 82 +41 32 655 80 90 www.microcrystal.ch sales@microcrystal.ch
micro crystal real time clock / cale nder module RV-8564-C2 2/20 contents 1.0 over view .................................................................................................................. .............................. 3 1.1. general descrip tion ...................................................................................................... ......................... 3 2.0 block diagram ............................................................................................................. .......................... 3 2.1 pi nout .................................................................................................................... ................................. 4 3.0 functional description .................................................................................................... ....................... 4 4.0 absolute ma ximum ratings................................................................................................... ................. 5 4.1 frequency characteristics ................................................................................................. .................... 5 4.2 dc charac teristics ........................................................................................................ ......................... 5 5.0 timing characteristics i 2 c bus ............................................................................................................... 6 5.1 i 2 c bus timing chart ............................................................................................................ ................. 6 6.0 register organiza tion ..................................................................................................... ....................... 7 6.1 control and stat us register ............................................................................................... ................... 7 6.2 seconds, minute s, hours, days ............................................................................................. ............... 8 6.3 weekdays .................................................................................................................. ............................ 8 6.4 months / century .......................................................................................................... ......................... 8 6.5 years, leap year compensation ............................................................................................. ............. 8 6.6 alarm re gisters ........................................................................................................... .......................... 9 6.7 clkout frequency sele ction and timer regist er ............................................................................. . 9 6.8 clkout-frequen cy output ................................................................................................... ............... 9 6.9 timer control ............................................................................................................. ............................ 9 7.0 characteristics of the i 2 c bus ................................................................................................................ 10 7.1 system c onfigurat ion ...................................................................................................... ...................... 10 7.2 start and st op condit ion .................................................................................................. ..................... 10 7.3 bit tr ansfer .............................................................................................................. .............................. 11 7.4 acknowledge ............................................................................................................... .......................... 11 7.5 addr essing ................................................................................................................ ............................. 11 8.0 i 2 c bus pr otocol ............................................................................................................... .................... 12 8.1 write mode ................................................................................................................ ............................ 12 8.2 read mode at s pecific ad dress ............................................................................................. ............... 13 8.3 read mode ................................................................................................................. ........................... 13 9.0 package dimensions and solder pad layout ................................................................................... ..... 14 9.1 package marking and pin 1 index............................................................................................ .............. 14 9.2 recommended refl ow temperature............................................................................................. ......... 15 9.3 handling pr ecautions ...................................................................................................... ....................... 16 10.0 charts of eletrica l characteristics . ..................................................................................... ................... 17 11.0 packing info carrier tape ................................................................................................ ...................... 18 11.1 reel 13 inch ............................................................................................................ .............................. 19 12.0 document revision history ................................................................................................ ................... 20 the i2c-bus is a trademark of philips electronics n.v.
micro crystal real time clock / cale nder module RV-8564-C2 3/20 RV-8564-C2 i 2 c-bus interface real time clock / calender module 1.0 overview ? rtc module with built-in crystal oscillating at 32?768khz ? 100% lead-free product ? small and compact package-size of 5.0 x 3.2 x 1.2mm ? 400khz two-wire i 2 c interface ? wide interface operati ng voltage: 1.8 ? 5.5v ? wide clock operating voltage: 1.2 ? 5.5v ? low power consumption: 250na typ @ 3.0v / 25c ? provides year, month, day, week day, hours, minutes, seconds ? alarm and timer functions ? century flag ? low-voltage detector, internal power-on reset ? pogrammable clock output for peripheral devices (32.768khz, 1024hz, 32hz, 1hz) ? i 2 c slave address: read a3h, write a2h 1.1 general description the RV-8564-C2 is a cmos real-time clock/calendar optimized for low power consumption. a programmable clock output, interrupt output and voltage low detector ar e also provided. all address and data are transferred serially via a two-line bi-directional i 2 c bus. maximum bus speed is 400kbit/sec. the built-in word address register is incremented automatically after each written or read data byte. 2.0 block diagram
micro crystal real time clock / cale nder module RV-8564-C2 4/20 2.1 pinout # 1 v dd # 10 clkoe # 2 clkout # 9 n.c. # 3 n.c # 8 n.c. # 4 scl # 7 int # 5 sda # 6 v ss 3.0 functional description the RV-8564-C2 rtc-module combines a rtc-ic with on-chip oscillator together with a 32.768khz quartz crystal in a miniature ceramic-package. the RV-8564-C2 contains sixteen 8-bit registers with an auto-incrementing address register, a frequency divider which provides the source clock for the real time clock (rtc), a programmable clock output, a timer, a voltage-low detector and a 400khz i 2 c bus interface. all 16 registers are designed as addressable 8-bit parallel registers although not all bits are implemented. the first two registers (memory address 00, 01) are used as control and/or status registers. the memory addresses 02 through 08 are used as counters for the clock function (seconds up to year counters). address locations 09 through 0c contain alarm registers which define the conditions for an alarm. address 0d controls the clkout output frequency. 0e and 0f are the timer control and timer registers, respectively. the seconds, minutes, hours, days, weekdays, months, years as well as the minute alarm, hour alarm, day alarm and weekday alarm registers are all coded in bcd format. when one of the rtc counters is read (memory locations 02 through 08), the contents of all counters are frozen at the beginning of a read cycle. therefore, faulty readi ng of the clock/calendar during a carry condition is prevented. alarm function modes by clearing the msb of one or more of the alarm registers (ae = ?alarm enable?), the corresponding alarm condition(s) will be active. in this way an alarm can be generated from once per minute up to once per week. the alarm condition sets the alarm flag af. the asserted af can be used to generate an interrupt (int). the af may only be cleared by software. timer the 8-bit count-down timer at address 0f is controlled by the timer co ntrol register at address 0e. the timer control register determines one of 4 source clock frequencies for the timer (4096hz, 64hz, 1 sec, or 1 min), and enables/disables the timer. the timer counts down from a software- loaded 8-bit binary value. at the end of every countdown, the timer sets the timer flag tf. the tf may only be cleared by software. the asserted tf can be used to generate an interrupt (int). the interrupt may be generated as a pulsed signal every countdown period or as a permanently active signal which follows the condition of the timer flag. ti/tp being used for this mode control. when reading the timer, the current countdown value is returned. clkout output a programmable square wave is available at the clkout pin. frequencies of 32768hz, 1024hz, 32hz and 1hz can be generated. clkout is a cmos push-pull output and if disabled it becomes logic zero. reset the RV-8564-C2 includes an internal reset circuit which is active whenever the oscillator is stopped. in the reset state the i 2 c bus logic is initialized and all registers, includi ng the address pointer, are cleared with the exception of bits fe, vl, td1, td0, testc and ae bits which are set to 1. voltage low detector & clock monitor the RV-8564-C2 has an on-chip voltage low detector. when v dd drops below v low the `voltage low` (vl, bit 7 in the seco nds register) is set to indicate that the integrity of the clock information is no longer guaranteed. the vl flag can only be cleared by software. the vl bit is intended to detect the situation when v dd is decreasing slowly for example under battery operation. should v dd reach v low before power is re-asserted then the vl bit will be set. this will indicate that the time may be corrupted. #1 #5 #6 #10
micro crystal real time clock / cale nder module RV-8564-C2 5/20 4.0 absolute maximum ratings parameter symbol conditions min. max. unit supply voltage v dd > gnd / < v dd -0.5 +6.5 v supply current i dd ; i ss v dd pin -50 +50 ma input voltage v i input pin gnd -0.5 v dd +0.5 v output voltage v o int pin gnd -0.5 v dd +0.5 v dc input current i i -10 +10 ma dc output current i o -10 +10 ma operating ambient temperature range t opr -40 +85 c storage temperature range t sto stored as bare product -55 +125 c 4.1 frequency characteristics parameter symbol conditions typ. max. unit frequency precision ? f / f t amb = +25c v dd = 3.0 v +/- 10 +/- 20 ppm frequency vs. voltage characteristics ? f / v t amb = +25c v dd = 1.8 v to 5.5 v +/- 0.8 +/- 1.5 ppm / v frequency vs. temperature characteristics ? f / f opr t reference = +25c v dd = 3.0 v -0.035 ppm / c 2 (t opr -t o ) 2 +/-10% ppm turnover temperature t o +25 +/-5 c aging first year max. v o ? f / f at 25c +/- 3 ppm oscillation start-up time i i 350 500 ms clkout duty cycle t clkout at 25c 50 40 / 60 % 4.2 dc charateristics parameter symbol conditions min. typ. max. unit power supply voltage i 2 c bus inactive, 25c 1.0 5.5 v supply voltage 400khz i 2 c bus activity 1.8 5.5 v clock data integrity v dd 25c v low 5.5 v power supply current f scl = 400khz 800 a current consumption (i 2 c bus activity) i ddo f scl = 100khz 200 a f scl = 0 hz, v dd = 5.0v 275 550 na f scl = 0 hz, v dd = 3.0v 250 500 na current consumption (i 2 c bus inactiv) i dd f scl = 0 hz, v dd = 2.0v 225 450 na f scl = 0 hz, v dd = 5.0v 2.5 3.4 a f scl = 0 hz, v dd = 3.0v 1.5 2.2 a current consumption clkout = 32.768khz, load = 7.5pf i dd32k f scl = 0 hz, v dd = 2.0v 1.1 1.6 a inputs low level input voltage v il v ss -0.5v 30% v dd v high level input voltage v ih 70% v dd v dd +0.5v v input leakage, intn i li v dd or v ss 1 a input capacitance c i 7 pf outputs sda low output current i ol(sda) v ol = 0.4v; v dd = 5v -3 ma int low output current i ol(int) v ol = 0.4v; v dd = 5v -1 ma clkout low output current i ol(clkout) v ol = 0.4v; v dd = 5v -1 ma clkout high output current i oh(clkout) v ol = 0.4v; v dd = 5v 1 ma leakage current i lo v dd or v ss -1 1 a voltage detector low voltage detection v low 0.9 1.1 v operating temperature range operating temperature range t opr -40 +85 c
micro crystal real time clock / cale nder module RV-8564-C2 6/20 5.0 timing characteristics i 2 c-bus parameter symbol min. typ. max. unit scl clock frequency f scl 400 khz start condition set-up time t su ; sta 0.6 s start condition hold time t hd ; sta 0.6 s data set-up time t su ; dat 100 ns data hold time t hd ; dat 0 ns stop condition set-up time t su ; sto 0.6 s bus free time between stop and start condition t buf 1.3 s scl ?low time? t low 1.3 s scl ?high time? t high 0.6 s scl and sda rise time tr 0.3 s scl and sda fall time tf 0.3 s tolerance spike time on bus t sp 50 ns 5.1 timing chart note: the i 2 c-bus access time between a start and a start condition or between a start and a stop condition to this device must be less than one second. the i2c-bus is a trademark of philips electronics n.v.
micro crystal real time clock / cale nder module RV-8564-C2 7/20 6.0 register organization address function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 00 control / status 1 test1 0 stop 0 test 0 0 0 01 control / status 2 0 x 0 ti / tp af af aie tie 02 seconds vl 40 20 10 8 4 2 1 03 minutes x 40 20 10 8 4 2 1 04 hours x x 20 10 8 4 2 1 05 days x x 20 10 8 4 2 1 06 weekdays x x x x x 4 2 1 07 months / century c x x 10 8 4 2 1 08 years 80 40 20 10 8 4 2 1 09 minute alarm ad 40 20 10 8 4 2 1 0a hour alarm ad x 20 10 8 4 2 1 0b day alarm ad x 20 10 8 4 2 1 0c weekday alarm ad x x x x 4 2 1 0d clkout frequency fe x x x x x fd1 fd0 0e timer control te x x x x x td1 td0 0f timer 128 64 32 16 8 4 2 1 bit positions labelled as ? x ? are not implemented. 6.1 control and status register control / status 1 stop: when set to 0 the rtc source clock runs. when set to 1, all rtc divider chain flip flops are asynchronously set to 0; the rtc clock is stopped. (clkout at 32.768khz is still available) test: the two bits, test and test1, are for device testing. make sure test bits are set to 0 during normal operation. if accidentally set to 1, they may modify the clock-data or result in abnormal time. control / status 2 af, tf: alarm flag, timer flag when an alarm occurs, af is set to 1. similarly, at the end of a timer countdown, tf is set to 1.these bits maintain their value until overwritten by software. if both timer and alarm interrupts are required in the application, the source of the interrupt can be determined by reading these bits. to prevent one flag being overwritten while clearing another, a logic and is performed during a write access. write ?1? to af or tf: no change to flag write ?0? to af or tf: respective flag is cleared. ti/tp: timer interrupt/ timer periodic int mode. ti/tp = 0: int is active when tf is active. (subject to the status of tie). aie,tie:alarm interrupt enable, timer interrupt enable these bits activate or deactivate the generation of an interrupt when af or tf is asserted, respectively. the interrupt is the logical or of these two conditions when both aie and tie are set. ti/tp: timer interrupt/ timer periodic int mode. ti/tp = 0: int is active when tf is active. (subject to the status of tie). ti/tp = 1: int pulses active according to the below table. (subject to the status of tie). int operation (ti/tp=1) int period timer source clock n>1 n=1 4096 hz 1/4096 seconds 1/8192 seconds 64hz 1/64 seconds 1/128 seconds 1hz 1/64 seconds 1/64 seconds 1/60hz 1/64 seconds 1/64 seconds
micro crystal real time clock / cale nder module RV-8564-C2 8/20 6.2 seconds, minutes, hours, days address function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 02 seconds vl 40 20 10 8 4 2 1 03 minutes x 40 20 10 8 4 2 1 04 hours x x 20 10 8 4 2 1 05 days x x 20 10 8 4 2 1 these registers contain the respective time and date values coded in bcd format. example: seconds register contai ns ?x1011001? = 59 seconds. the RV-8564-C2 stores the time of day in 24-hour format. note: bit 7 of the seconds register is used to return the ?voltage low? (vl) detection bit. 6.3 weekdays address day bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 06 sunday x x x x x 0 0 0 06 monday x x x x x 0 0 1 06 tuesday x x x x x 0 1 0 06 wednesday x x x x x 0 1 1 06 thursday x x x x x 1 0 0 06 friday x x x x x 1 0 1 06 saturday x x x x x 1 1 0 the weekday register has a bit assignment as shown in the table above. only the 3 lsbs are utilized. 6.4 months / century address month bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 07 january c x x 0 0 0 0 1 07 february c x x 0 0 0 1 0 07 march c x x 0 0 0 1 1 07 april c x x 0 0 1 0 0 07 may c x x 0 0 1 0 1 07 june c x x 0 0 1 1 0 07 july c x x 0 0 1 1 1 07 august c x x 0 1 0 0 0 07 september c x x 0 1 0 0 1 07 october c x x 1 0 0 0 0 07 november c x x 1 0 0 0 1 07 december c x x 1 0 0 1 0 the months/century register utilizes t he 5 lsbs to encode the month of t he year as shown in the table below. bit 7 of the months/century register al so contains the century indicator. when c=0, the century is 20xx, when c=1 the century is 19xx. this bit is toggled when the years register overflows from 99 to 00. 6.5 years, leap year compensation address years bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 08 years 80 40 20 10 8 4 2 1 the years register encodes the tw o lower year digits in bcd format according to the table above. when the years register overflows from 99 to 00, the century bit c in the months/century register is toggled . leap year compensation. the RV-8564-C2 compensates for leap years by adding a 29th day to february if the year counter contains a value which is divisible by 4, including the year 00.
micro crystal real time clock / cale nder module RV-8564-C2 9/20 6.6 alarm registers address function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 09 minute alarm ad 40 20 10 8 4 2 1 0a hour alarm ad x 20 10 8 4 2 1 0b day alarm ad x 20 10 8 4 2 1 0c weekday alarm ad x x x x 4 2 1 ad = 0: alarm enable: compare alarm register with current time. ad = 1: ignore alarm register the registers at addresses 09h through 0ch contain alarm information. when one or more of these registers is loaded with a valid minute, hour, day or weekday and its corresponding ?alarm disable? (ad, bit 7) is ?0?, then that inform ation will be compared with the current minute, hour, day and weekday. when all enabled comparisons first match, the ?alarm fl ag? (af, bit 3 in control/status 2 register) is set. af will remain set until cleared by software. once af has been cleared it will only be set again when the time increments to match the alarm condition once more. alarm registers which have their ?alarm disable? bit at ?1? will be ignored, combining the ad-bits 7; a highly versatile alarm can be set. when all ad-bits 7 are set to ?1?, no alarm will occure. 6.7 clkout frequency selection and timer register address function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0d clkout frequency fe x x x x x fd1 fd0 0e timer control te x x x x x td1 td0 0f timer 128 64 32 16 8 4 2 1 6.8 clkout /frequency-output output frequency fd1 fd0 32768 hz 0 0 1024 hz 0 1 32 hz 1 0 1 hz 1 1 the clkout pin is controlled by two signals; the frequency enable (fe bit 7) and clkout output- enable pin 10 (clkoe). fe and clkoe fe clkoe clkout 0 0 0 0 1 0 1 0 0 1 1 selected frequency 6.9 timer control the timer register is an 8-bit binary countdown timer. it is enabled/disabled via the timer control register, timer enable (te, bit 7) te = 0: timer is disabled. te = 1: timer is enabled (i.e timer counts down) timer source clock td1 td0 4096 hz 0 0 64 hz 0 1 1 second 1 0 1 minute 1 1 td1, td0: timer source clock frequency select. these bits determine t he source clock for the countdown timer (address 0fh). when not in use, td1 & td0 should be set to 1/60hz for power saving. the source clock for the timer is also selected by the timer control register. other timer properties such as single or periodic interrupt generation are controlled via the control/status 2 register (address 01h). for accurate read back of the count down value, the i 2 c clock (sda) must be oper ating at a frequency of at least twice the selected timer clock.
micro crystal real time clock / cale nder module RV-8564-C2 10/20 7.0 characteristics of the i 2 c bus the i 2 c-bus is for bidirectional, two-line communication between different ics or modules. the two lines are a serial-dataline (sda) and a serial-clockline (scl). scl and sda ports are open-drain or open-collector architecture to allow connections of multiple devices . both lines must be connected to a positive supply via pull-up resistors. data transfer may be initiated only when the bus is not busy. 7.1 system configuration since multiple devices can be connected with the i 2 c-bus, all i 2 c-bus devices have a fixed, unique device number built-in to allow individual addressig of each device. the device that controls the i 2 c-bus is the ?master?, the devices whic h are controlled by the master are the ?slaves?. a device generating a message is a ?transmitte r?, a device receiving a message is the ?receiver?. the RV-8564-C2 acts as a slave-receiver or slave-transmitter. before any data is transmitted on the i 2 c -bus, the device which should respond is addressed first. the addressing is always carried out with the first byte transmitted after the start procedure. therefore the clock signal scl is only an input si gnal, but the data signal sda is a bidirectional line. 7.2 start and stop conditions both, sda data and scl clock-lines remain high when the bus is not busy. a high-to-low transition of the data line, while the clo ck is high, is defined as the start condition (s). a low-to-high transition of the data line, while the clock is high, is defined as the stop condition (p).
micro crystal real time clock / cale nder module RV-8564-C2 11/20 7.3 bit transfer 1 data bit is transferred during each clock pulse. the data on the sda line must remain stable during the high period of the clock pulse, data change should be executed during the low periode of the clock pulse. 7.4 acknowledge there is no limit to the numbers of data bytes transmitted between the st art and stop conditions. each byte (of 8 bits) is followed by an acknowledge bit. therefore, the master generates an extra acknowledge-clock pulse. the ac knowledge bit is a high level signal put on the sda line by the transmitter-device, the re ceiver-device must pull down the sda line during the acknowledge-clock-pulse to confirm the correct reception of the last byte. either a master-receiver or a slave-receiver whic h is addressed must generate an acknowledge after the correct reception of each byte. the device that acknowledges must pull down the sda line during the acknowledge clock pulse, so that the sda line is stable low during the high period of the acknowledge related clock pulse. (set-up and hold times must be taken into consideration). if the master is addressed as receiver , it can stop data transmission by not generating an acknowledge on the last byte that has been sent from the slave transmitter. in this event, the slave-transmitter must leave the data line high to enable the master to generate a stop condition.
micro crystal real time clock / cale nder module RV-8564-C2 12/20 7.5 addressing slave address RV-8564-C2 8.0 i 2 c bus protocol before any data is transmitted on the i2c-bus, the device which should respond is addressed first. the addressing is always carried out with the first byte transmitted after the start procedure. the RV-8564-C2 acts as a slave receiver or slave transmitter. therefore the clock signal scl is only an input sig nal, but the data signal sda is a bidirectional line. 8.1 write mode master transmits to slave-re ceiver at specified address the word-address is four bit value that def ines which register is to be accessed next. the upper four bits of the word-address are not used. after reading or writing one byte, the word-a ddress is automatically incremented by 1. 1) master sends-out the ?start condition?. 2) master sends-out the ?slave address?, a2h for the RV-8564-C2; the r/w bit in write mode. 3) acknowledgement from the RV-8564-C2. 4) master sends-out the ?word address? to the RV-8564-C2. 5) acknowledgement from the RV-8564-C2. 6) master sends-out the ?data? to write to the specified address in step 4). 7) acknowledgement from the RV-8564-C2. 8) steps 6) and 7) can be repeated if necessary. the address will be incremented automatically in the RV-8564-C2. 9) master sends-out the ?stop condition?.
micro crystal real time clock / cale nder module RV-8564-C2 13/20 8.2 read mode at specific address master reads data after setting word address 1) master sends-out the ?start condition?. 2) master sends-out the ?slave address?, a2h for the RV-8564-C2; the r/w bit in write mode. 3) acknowledgement from the RV-8564-C2. 4) master sends-out the ?word address? to the RV-8564-C2. 5) acknowledgement from the RV-8564-C2. 6) master sends-out the ?start condition?. ?stop condition? has not been sent. 7) master sends-out the ?slave address?, a3h for the RV-8564-C2; the r/w bit in read mode. 8) acknowledgement from the RV-8564-C2. at this point, the master becomes a receiver, the slave becomes the transmitter. 9) the slave sends-out the ?data? from the word address specified in step 4). 10) acknowledgement from the master. 11) steps 9) and 10) can be repeated if necessary. the address will be incremented automatically in the RV-8564-C2. 12) the master, addressed as receiver, can stop data transmission by not generating an acknowledge on the last byte that has been sent from the slave transmitter. in this event, the slave-transmitter must leave the data line high to enable the master to generate a stop condition. 13) master sends-out the ?stop condition?. 8.3 read mode master reads slave-transmitter immediately after first byte 1) master sends-out the ?start condition?. 2) master sends-out the ?slave address?, a3h for the RV-8564-C2; the r/w bit in read mode. 3) acknowledgement from the RV-8564-C2. at this point, the master becomes a receiver, the slave becomes the transmitter 4) the RV-8564-C2 sends-out the ?data? from the last accessed word address incremented by 1. 5) acknowledgement from the master. 6) steps 4) and 5) can be repeated if necessary. the address will be incremented automatically in the RV-8564-C2. 7) the master, addressed as receiver, can stop data transmission by not generating an acknowledge on the last byte that has been sent from the slave transmitter. in this event, the slave-transmitter must leave the data line high to enable the master to generate a stop condition.. 8) master sends-out the ?stop condition?.
micro crystal real time clock / cale nder module RV-8564-C2 14/20 9.0 package dimensions and solderpad layout package dimensions; bottom view recommended solderpad layout 9.1 package marking and pin 1 index
micro crystal real time clock / cale nder module RV-8564-C2 15/20 9.2 recommended reflow temperatur e (for ?lead-free? soldering) 270 220 170 120 70 20 c 183c 125c ramp up 3c/minute max. cooling rate 6c/second max. ramp up 3c/minute max. 60-150 seconds soak zone 120 seconds min. 360 seconds max. 240(+0/-5)c max. 20 sec. v i
micro crystal real time clock / cale nder module RV-8564-C2 16/20 9.2 handling precautions for crystals the built-in tuning-fork crystal consists of pure silicon di oxide in crystalline form. t he cavity inside the package is evacuated and hermetically sealed in order for the cr ystal blank to function undisturbed from air molecules, humidity and other influences. shock and vibration keep the crystal from being exposed to excessive mechanical shock and vibration . micro crystal guarantees that the crystal will bear a mechani cal shock of 5000g / 0.3 ms. the following special situations may generate either shock or vibration: multiple pcb panels - usually at the end of the pick & place proce ss the single pcbs are cut out with a router. these machines sometimes generate vibrations on the pcb that have a fundamental or harmonic frequency close to 32.768 khz. this might cause breakage of cr ystal blanks due to resonance. router speed should be adjusted to avoid resonant vibration. ultrasonic cleaning - avoid cleaning processes using ultrasonic energy. these processes can damages crystals due to mechanical resonance of the crystal blank. overheating, rework high-temperature-exposure avoid overheating the package. the package is sealed with a sealring consisting of 80% gold and 20% tin. the eutectic of this alloy is at 280c. heating the sealring up to >280c will cause melting of the metal seal which then, due to the vacuum, is sucked into the cavity forming an air duct. this happens when using hot-air-gun set at temperatures >300c. use the following methods for re-work: ? use a hot-air- gun set at 260c ? use 2 temperature-controlled soldering irons, set at 2 60c, with special-tips to contact all solder-joints from both sides of the package at the same time, re move part with tweezers when pad solder is liquid.
micro crystal real time clock / cale nder module RV-8564-C2 17/20 10.0 charts of typical electrical characteristics i dd power consumption i dd power consumption in ?timekeeping? or standby-mode. in ?timekeeping?or standby-mode. conditions: conditions: clkout disabled clkout enabled clkout-frequency 32.768khz frequency vs v dd voltage drift frequency vs temperature drift in ?timekeeping? or standby-mode. in ?timekeeping?or standby-mode. conditions: conditions: clkout enabled clkout enabled clkout-frequency 32.768khz clkout-frequency 32.768khz t ambient 25c t ambient -40 to +85c 0.0 1.0 2.0 3.0 4.0 5.0 0123456 supply voltage v dd [v] i dd [a] 0.0 0.2 0.4 0.6 0.8 1.0 0123456 supply voltage v dd [v] i dd [a] -5 -4 -3 -2 -1 0 1 2 3 4 5 0123456 v dd [v] ? f/f l [ppm] -180 -160 -140 -120 -100 -80 -60 -40 -20 0 20 -50 0 50 100 tem perature [c] ? f/f l [ppm] -0.035 pp m / c 2 * ( t-t 0 ) 2 + / -10% t 0 25 c +/- 5c c load = 0pf c load = 7.5pf
micro crystal real time clock / cale nder module RV-8564-C2 18/20 11.0 packing info carrier tape 12 mm carrier-tape: material: polystyrene / butadine or polystyrol black, conductive cover tape: base material: polyester, conductive 0.061 mm adhesive material: pressure-s ensitive synthetic polymer tape leader and trailer: 300 mm minimum all dimensions are in mm reels: diameter material. rtc?s per reel. 7? plastic, polystyrene 1000 10? plastic, polystyrene 2500 13? plastic, polystyrol 5000 drawing nr. m43.611.10.09 0,05 0,1 0 , 1 0,1 0,1 0,1 0,1 0 , 1 0 , 1 0 , 2 0 + 0 , 1 0 , 1 8 3,5 1,35 5 , 5 1 , 7 5 2 , 8 5 0,3 2 4 ? 1 , 5 ? 1 , 5 1 2 5 , 3 user direction of feed
micro crystal real time clock / cale nder module RV-8564-C2 19/20 11.1 reel 13 inch for 12 mm tape reel: diameter material 13? plastic, polystyrol
micro crystal real time clock / cale nder module RV-8564-C2 20/20 12.0 document revision history date revision # revision details february 2005 1.1 first release information furnished is believed to be accurate and reliable. however, micro crystal assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use . in accordance with our policy of continuous development and improvement, micro crystal reserves the right to modify specifications mentioned in this publication without prior notice. this product is not authorized for use as critical component in life support devices or systems.

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